CPC H01L 23/3677 (2013.01) [H01L 21/4871 (2013.01); H01L 23/373 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01)] | 20 Claims |
9. An integrated chip comprising:
a device layer comprising a front-side surface opposite a back-side surface;
a plurality of semiconductor devices arranged on the front-side surface of the device layer;
a first interconnect structure arranged on the front-side surface of the device layer;
a second interconnect structure overlying the back-side surface of the device layer, wherein the first and second interconnect structures respectively comprise a plurality of conductive wires and a plurality of conductive vias arranged within an interconnect dielectric structure and electrically coupled to the plurality of semiconductor devices; and
a first heat dispersion layer arranged between the back-side surface of the device layer and the second interconnect structure, wherein a first thermal conductivity of the first heat dispersion layer is greater than a thermal conductivity of the interconnect dielectric structure.
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