US 12,073,902 B2
Memory, memory system, operation method of the memory, and operation of the memory system
Kyung Whan Kim, Gyeonggi-do (KR); Sun Hwa Park, Gyeonggi-do (KR); Kee Yun Kim, Gyeonggi-do (KR); Sung Joo Ha, Gyeonggi-do (KR); and Ah Reum Han, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Dec. 8, 2022, as Appl. No. 18/077,795.
Application 18/077,795 is a continuation of application No. 17/075,268, filed on Oct. 20, 2020, granted, now 11,557,366.
Claims priority of application No. 10-2019-0150511 (KR), filed on Nov. 21, 2019; and application No. 10-2020-0068144 (KR), filed on Jun. 5, 2020.
Prior Publication US 2023/0116422 A1, Apr. 13, 2023
Int. Cl. G11C 29/42 (2006.01); G06F 11/14 (2006.01); G11C 29/00 (2006.01); G11C 29/18 (2006.01); G11C 29/30 (2006.01); G11C 29/44 (2006.01)
CPC G11C 29/42 (2013.01) [G06F 11/1451 (2013.01); G06F 11/1469 (2013.01); G11C 29/30 (2013.01); G11C 29/44 (2013.01); G11C 29/702 (2013.01); G11C 29/785 (2013.01); G11C 2029/1802 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method for operating a memory system, comprising:
determining, by the memory, whether to perform an error correction operation;
generating, by the memory, an internal address in response to the determination of performing the error correction operation;
reading, by the memory, data and an error correction code corresponding to the data from memory cells that are selected based on the internal address;
performing, by the memory, an error correction operation on the data based on the error correction code;
writing, by the memory, error-corrected data and an error correction code corresponding to the error corrected data into the memory cells that are selected based on the internal address;
determining, by the memory, one or more regions among regions as a repair-requiring region based on an error which is detected when the memory performs the error correction operation;
transferring, by the memory, first data read from the repair-requiring region to a memory controller;
applying, by the memory controller, a first command to the memory;
repairing, by the memory, the repair-requiring region with a redundant region of the memory in response to the first command;
transferring, by the memory controller, the first data to the memory such that the first data is written into the redundant region;
applying, by the memory controller, a second command to the memory;
canceling, by the memory, a previous repair operation right before a current repair operation in response to the second command;
transferring, by the memory, second data that are read from the repair-requiring region to the memory controller;
applying, by the memory controller, a third command to the memory;
repairing, by the memory, the repair-requiring region with a redundant region of the memory in response to the third command; and
transferring, by the memory controller, the second data to the memory such that the second data is written into the redundant region.