US 12,073,889 B2
Non-volatile memory device and method of operating the same
Dong-Hun Kwak, Hwaseong-Si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Feb. 10, 2023, as Appl. No. 18/108,085.
Application 18/108,085 is a continuation of application No. 17/949,752, filed on Sep. 21, 2022.
Application 18/108,085 is a continuation of application No. 17/665,049, filed on Feb. 4, 2022, granted, now 11,594,286.
Application 17/949,752 is a continuation of application No. 16/935,559, filed on Jul. 22, 2020, granted, now 11,276,472, issued on Mar. 15, 2022.
Application 16/935,559 is a continuation in part of application No. 16/547,416, filed on Aug. 21, 2019, granted, now 11,217,314, issued on Jan. 4, 2022.
Claims priority of application No. 10-2018-0160352 (KR), filed on Dec. 12, 2018.
Prior Publication US 2023/0197166 A1, Jun. 22, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/10 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01)
CPC G11C 16/26 (2013.01) [G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/3459 (2013.01); H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02); H01L 2224/05147 (2013.01); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of programming a non-volatile memory device, the method comprising:
applying a program voltage to a selected word line connected to a selected memory cell during a program time; and
performing a first program verification operation on the selected memory cell during a first verification time following the program time, the first verification time including a first section, a second section following the first section, and a third section following the second section,
wherein the performing of the first program verification operation comprises:
applying a first voltage level to the selected word line during the first section,
applying a second voltage level to the selected word line during the second section, wherein the second voltage level is different from the first voltage level, and
applying a first program verification voltage level to the selected word line during the third section, wherein the first program verification voltage level is different from the second voltage level,
wherein the first and second sections correspond to a word line setup time required to perform the first program verification operation.