US 12,073,888 B2
Non-volatile memory device
Youn-Yeol Lee, Seoul (KR); and Wook-Ghee Hahn, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 19, 2023, as Appl. No. 18/123,302.
Application 18/123,302 is a continuation of application No. 17/495,645, filed on Oct. 6, 2021, granted, now 11,631,465.
Application 17/495,645 is a continuation of application No. 17/014,511, filed on Sep. 8, 2020, granted, now 11,164,638, issued on Nov. 2, 2021.
Application 17/014,511 is a continuation in part of application No. 16/241,095, filed on Jan. 7, 2019, granted, now 10,790,291, issued on Sep. 29, 2020.
Claims priority of application No. 10-2018-0077323 (KR), filed on Jul. 3, 2018.
Prior Publication US 2023/0223088 A1, Jul. 13, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/24 (2006.01); G11C 7/10 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01)
CPC G11C 16/24 (2013.01) [G11C 7/1039 (2013.01); G11C 16/0433 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for internally transferring data in a non-volatile memory including an upper semiconductor layer vertically stacked on a lower semiconductor layer, wherein the upper semiconductor layer includes a first memory group and a second memory group separated in a first horizontal direction by a separation region, and the lower semiconductor layer includes a bypass circuit underlying at least a portion of the separation region, the method comprising:
sensing first data stored in a first memory block of the first memory group using a first page buffer associated with the first memory group and storing the first data in the bypass circuit;
transferring the first data stored in the bypass circuit to a second page buffer associated with the second memory group;
programming the first data transferred to the second page buffer in a first memory block of the second memory group;
sensing second data stored in a second memory block of the first memory group using the first page buffer and storing the second data together with the first data in the bypass circuit;
transferring the second data stored in the bypass circuit together with the first data stored in the bypass circuit to the second page buffer;
programming the first data together with the second data transferred to the second page buffer in the second memory group as a unitary block of data; and
after storing the first data and the second data in the bypass circuit, waiting until an idle time for the non-volatile memory device is detected and then transferring the first data together with the second data as a unitary block of data from the bypass circuit to the second page buffer.