US 12,073,225 B2
Technology to measure boot activity before a processor enters a working state
Subrata Banik, Bangalore (IN); Asad Azam, El Dorado Hills, CA (US); Vincent James Zimmer, Issaquah, WA (US); and Rajaram Regupathy, Bangalore (IN)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Nov. 13, 2020, as Appl. No. 17/097,055.
Claims priority of application No. 202041041131 (IN), filed on Sep. 23, 2020.
Prior Publication US 2022/0091853 A1, Mar. 24, 2022
Int. Cl. G06F 9/4401 (2018.01); G06F 3/06 (2006.01); G06F 13/16 (2006.01)
CPC G06F 9/4403 (2013.01) [G06F 3/0611 (2013.01); G06F 3/0659 (2013.01); G06F 3/068 (2013.01); G06F 13/1668 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A data processing system comprising:
a processing core to execute a basic input/output system (BIOS) as part of a boot process;
static random-access memory (SRAM) in communication with the processing core; and
a pre-BIOS component in communication with the SRAM, wherein the pre-BIOS component is configured to execute pre-BIOS firmware before the processing core begins executing the BIOS, and wherein the pre-BIOS firmware, when executed by the pre-BIOS component, causes the pre-BIOS component to:
initialize the pre-BIOS component;
measure an amount of time taken to initialize the pre-BIOS component; and
save the measured amount of time to the SRAM as a pre-BIOS boot-time record.