US 12,073,159 B2
Computing device and method for detecting clock domain crossing violation in design of memory device
Hyungjung Seo, Suwon-si (KR); Youngrok Choi, Seoul (KR); and Sojung Park, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Sep. 14, 2021, as Appl. No. 17/475,107.
Claims priority of application No. 10-2021-0047663 (KR), filed on Apr. 13, 2021.
Prior Publication US 2022/0327269 A1, Oct. 13, 2022
Int. Cl. G06F 30/30 (2020.01); G06F 30/327 (2020.01); G06F 30/3312 (2020.01); G06F 30/3323 (2020.01)
CPC G06F 30/3312 (2020.01) [G06F 30/327 (2020.01); G06F 30/3323 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method of operating a computing device for detecting clock domain crossing (CDC) violation in a design of a memory device, the method comprising executing, by a processor, computer readable program instructions stored in a non-transitory memory of the memory device to perform operations comprising:
parsing a Netlist to generate a circuit database;
parsing a clock tree using the circuit database to generate a clock tree database;
extracting a non-toggled point using the clock tree database to generate a false path database based on the non-toggled point; and
extracting a CDC violation identified from one or more simulation waveforms using the clock tree database and the false path database.