US 12,073,112 B2
Enabling memory access transactions for persistent memory
David Boles, Austin, TX (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Feb. 22, 2022, as Appl. No. 17/677,535.
Claims priority of provisional application 63/158,120, filed on Mar. 8, 2021.
Prior Publication US 2022/0283735 A1, Sep. 8, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/0622 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
receiving, by a processing device of a memory sub-system, a first request from a host system to initiate a memory access transaction, wherein the first request indicates a range of addresses associated with host data items of the memory access transaction;
allocating a region of a memory buffer residing on a volatile memory device of the memory sub-system for storage of the host data items having addresses within the range of addresses;
creating, in a metadata structure, a mapping between a transaction identifier for the memory access transaction and the range of addresses associated with the host data items of the memory access transaction;
storing each incoming host data item having an address within the range of addresses in the memory buffer residing on the volatile memory device;
identifying, based on the mapping in the metadata structure, one or more host data items that are stored at the memory buffer and associated with the transaction identifier;
migrating the one or more the host data items from the memory buffer to a persistent memory device;
updating the metadata structure to remove the mapping between the transaction identifier for the memory access transaction and the range of addresses; and
committing the memory access transaction.