CPC G06F 3/0613 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0673 (2013.01)] | 23 Claims |
1. An apparatus comprising:
an interface for a memory interconnect;
data path circuitry configured to:
implement pulse amplitude modulation (PAM) signaling for data written to or read from memory via the interface, and
implement a data mask function that is configured to:
enable data masking for a group of data bits to be transmitted via a set of data lines of the memory interconnect using the PAM signaling;
alter at least one PAM symbol of a set of PAM symbols that corresponds to the group of data bits to provide an altered set of PAM symbols with respective states that indicate data masking is enabled for the group of data bits; and
transmit, via the set of data lines of the memory interconnect, the altered set of PAM symbols with the respective states that indicate data masking is enabled for the group of data bits.
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