US 12,072,776 B2
Hardware control path redundancy for functional safety of peripherals
Veeramanikandan Raju, Bangalore (IN); and Anand Kumar G, Bangalore (IN)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Feb. 9, 2023, as Appl. No. 18/166,787.
Application 18/166,787 is a continuation of application No. 17/409,029, filed on Aug. 23, 2021, granted, now 11,604,709.
Claims priority of application No. 202141007281 (IN), filed on Feb. 22, 2021.
Prior Publication US 2023/0185679 A1, Jun. 15, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 11/14 (2006.01); G06F 11/16 (2006.01); G06F 13/20 (2006.01)
CPC G06F 11/1616 (2013.01) [G06F 11/0745 (2013.01); G06F 11/0757 (2013.01); G06F 11/1441 (2013.01); G06F 13/20 (2013.01); G06F 2201/805 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A circuit comprising:
a primary register region and a primary shadow register;
a secondary register region and a secondary shadow register; and
a safety controller configured to:
transition to a first write state when a first write signal to write a first value to the primary register region is detected, and copy the first value written to the primary register region to the primary shadow register;
transition to a second write state when a second write signal to write a second value to the secondary register region is detected within a set amount of time of detection of the first write signal, and in the second write state, copy the second value written to the secondary register region to the secondary shadow register;
transition to a compare state to receive a comparison signal indicating whether the first value is the same as the second value; and
transition to an update state when the first value is the same as the second value.