US 11,744,074 B2
Method for manufacturing semiconductor memory device and semiconductor memory device
Hirotaka Tsuda, Tokyo (JP); and Yusuke Oshiki, Mie (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Apr. 7, 2022, as Appl. No. 17/658,410.
Application 15/440,025 is a division of application No. 14/639,084, filed on Mar. 4, 2015, granted, now 9,627,401, issued on Apr. 18, 2017.
Application 17/658,410 is a continuation of application No. 16/780,935, filed on Feb. 4, 2020, granted, now 11,322,513.
Application 16/780,935 is a continuation of application No. 16/162,667, filed on Oct. 17, 2018, granted, now 10,593,694, issued on Mar. 17, 2020.
Application 16/162,667 is a continuation of application No. 15/440,025, filed on Feb. 23, 2017, granted, now 10,141,329, issued on Nov. 27, 2018.
Claims priority of application No. 2014-221032 (JP), filed on Oct. 30, 2014.
Prior Publication US 2022/0231045 A1, Jul. 21, 2022
Int. Cl. H01L 27/11582 (2017.01); H10B 43/27 (2023.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01); H10B 43/10 (2023.01)
CPC H10B 43/27 (2023.02) [H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 29/66833 (2013.01); H01L 29/7926 (2013.01); H10B 43/10 (2023.02); H01L 21/31144 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a stacked body including a plurality of electrode layers stacked with insulators interposed between the electrode layers;
a separation portion extending in a stacking direction of the stacked body and in a first direction orthogonal to the stacking direction, and separating the stacked body into a first portion and a second portion of the stacked body in a second direction orthogonal to the stacking direction and the first direction, the separation portion being disposed between the first and second portions of the stacked body, the first and second portions having a pair of sidewalls facing each other with the separation portion interposed; and
a plurality of columnar portions penetrating through the stacked body in the stacking direction, and each including a semiconductor film extending in the stacking direction and a cylindrical film provided between the electrode layers and the semiconductor film, the plurality of columnar portions including first columnar portions penetrating through the first portion of the stacked body in the stacking direction and second columnar portions penetrating through the second portion of the stacked body in the stacking direction,
the pair of sidewalls including a sidewall on the first portion side and a sidewall on the second portion side,
first concave portions being disposed at the sidewall on the first portion side along the first direction and second concave portions being disposed at the sidewall on the second portion side along the first direction,
in a transversal cross section of the first and second portions of the stacked body orthogonal to the stacking direction, the first columnar portions being provided in first openings of the first portion of the stacked body respectively and the second columnar portions being provided in second openings of the second portion of the stacked body respectively,
the first openings and third openings corresponding to the first concave portions being periodically arrayed in the transversal cross section, each of the first concave portions in the transversal cross section being a part of a corresponding third opening of the third openings respectively, and the second openings and fourth openings corresponding to the second concave portions being periodically arrayed in the transversal cross section, each of the second concave portions in the transversal cross section being a part of a corresponding fourth opening of the fourth openings respectively, and
a width in the second direction between the pair of sidewalls being larger than a diameter of the first openings and a diameter of the second openings.