US 11,744,068 B2
Three-dimensional semiconductor memory device including slit structures
Min Jae Hur, Icheon-si (KR); Ji Hyeun Shin, Icheon-si (KR); Ju Hun Kim, Icheon-si (KR); Bo Ram Park, Icheon-si (KR); and Ji Woong Sue, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Sep. 16, 2020, as Appl. No. 17/23,168.
Claims priority of application No. 10-2020-0059681 (KR), filed on May 19, 2020.
Prior Publication US 2021/0366925 A1, Nov. 25, 2021
Int. Cl. H10B 43/27 (2023.01); H10B 43/10 (2023.01); G11C 16/08 (2006.01); H10B 43/35 (2023.01)
CPC H10B 43/27 (2023.02) [G11C 16/08 (2013.01); H10B 43/10 (2023.02); H10B 43/35 (2023.02)] 15 Claims
OG exemplary drawing
 
10. A semiconductor memory device comprising:
a slit structure configured to divide a plurality of memory blocks,
wherein the slit structure comprises first and second slit portions alternately arranged and extending parallel to each other in a first direction, and third and fourth slit portions extending parallel to each other in a second direction perpendicular to the first direction, the third slit portion configured to connect first ends of the first and second slit portions with each other, and the fourth slit portion configured to connect second ends of the first and second slit portions with each other,
wherein the first slit portion comprises a slit region, and
wherein the second slit portion has a dashed shape including the slit region and at least one bridge region.