CPC H04W 72/1268 (2013.01) [H04L 5/0007 (2013.01); H04L 5/0051 (2013.01); H04L 27/2607 (2013.01); H04L 27/2613 (2013.01); H04W 72/0446 (2013.01); H04W 72/23 (2023.01)] | 14 Claims |
1. An apparatus configured to perform operations for a user equipment (UE), the apparatus comprising:
at least one processor; and
at least one memory operably connected to the at least one processor and storing instructions that, based on being executed by the at least one processor, perform operations comprising:
receiving first downlink control information (DCI) for scheduling a Physical Uplink Shared Channel (PUSCH) in an n-th transmission time unit, wherein the first DCI comprises a first DMRS pattern field of 2 bits that indicates a demodulation reference signal (DMRS) transmission in an initial symbol of an (n+k)-th transmission time unit,
receiving second DCI for scheduling the PUSCH in the (n+k)-th transmission time unit, where k is an integer greater than or equal to 1, and wherein the second DCI includes a second DMRS pattern field of 2 bits,
wherein the first DCI further comprises first information regarding at least one of a cyclic shift, an Interleaved Frequency Division Multiple Access (IFDMA) comb, resource allocation, precoding, or a number of layers,
based on the second DMRS pattern field in the second DCI not indicating any DMRS transmission in the initial symbol of the (n+k)-th transmission time unit:
discarding the second DCI, and
based on the second DMRS pattern field in the second DCI indicating the DMRS transmission in the initial symbol of the (n+k)-th transmission time unit, with the second DCI further comprising second information regarding at least one of a cyclic shift, an IFDMA comb, resource allocation, precoding, or a number of layers:
based on the first information in the first DCI being inconsistent with the second information in the second DCI:
discarding the second DCI.
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