US 11,743,603 B2
Solid-state imaging device and information processing method of solid-state imaging device
Yusuke Minagawa, Tokyo (JP); Taishin Yoshida, Tokyo (JP); Marie Toyoshima, Kanagawa (JP); Toru Akishita, Tokyo (JP); Tomohiro Morimoto, Kanagawa (JP); Masafumi Kusakawa, Tokyo (JP); Ikuhiro Tamura, Kanagawa (JP); Takahiro Akahane, Tokyo (JP); Eiji Hirata, Tokyo (JP); and Yoshinobu Furusawa, Fukuoka (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 16/477,989
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Nov. 29, 2017, PCT No. PCT/JP2017/042846
§ 371(c)(1), (2) Date Jul. 15, 2019,
PCT Pub. No. WO2018/135142, PCT Pub. Date Jul. 26, 2018.
Claims priority of application No. 2017-009259 (JP), filed on Jan. 23, 2017.
Prior Publication US 2019/0347963 A1, Nov. 14, 2019
Int. Cl. H04N 25/00 (2023.01); G06F 21/72 (2013.01); G09C 1/00 (2006.01); H01L 27/146 (2006.01); H04N 25/633 (2023.01); H04L 9/32 (2006.01); H04N 25/65 (2023.01); H04N 25/67 (2023.01); H04N 25/79 (2023.01); H04N 25/75 (2023.01)
CPC H04N 25/00 (2023.01) [G06F 21/72 (2013.01); G09C 1/00 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H04N 25/633 (2023.01); H04L 9/3231 (2013.01); H04N 25/65 (2023.01); H04N 25/67 (2023.01)] 20 Claims
OG exemplary drawing
 
1. A solid-state imaging device adapted to encrypt data, the solid-state imaging device comprising:
a sensor die comprising an array of imaging pixels formed on a first side of the sensor die and first wiring layers formed on a second side of the sensor die, wherein at least one of the imaging pixels is configured to generate specific signals, the specific signals being based on a physically unclonable function, the specific signals not output as an imaging result of the solid-state imaging device, wherein generating the specific signals not output as the imaging result of the solid-state imaging device comprises:
reading stored position information for each pixel block of a plurality of pixel blocks configured to generate pixel values that are not included within a range surrounding an average pixel value; and
using the stored position information for each pixel block, acquiring a respective pixel value for the pixel block;
a logic die comprising second wiring layers formed on a first side of the logic die; and
an encryption processor on the logic die configured to generate encrypted data using the specific signals, wherein the first side of the logic die is mounted adjacent to the second side of the sensor die and the first wiring layers electrically connect to the second wiring layers, wherein the at least one of the imaging pixels, the encryption processor, and a connecting conductor in which the specific signals pass through from the at least one of the imaging pixels to the encryption processor are located interior to the solid-state imaging device.