CPC H04L 27/3483 (2013.01) [H04L 1/0048 (2013.01); H04L 1/0054 (2013.01); H04L 1/0055 (2013.01); H04L 1/0071 (2013.01); H04L 27/38 (2013.01)] | 4 Claims |
1. A reception device comprising:
a receiver configured to receive a multiplexed signal into which a plurality of modulated symbol streams have been multiplexed by superposition coding, the plurality of modulated symbol streams including a first modulated symbol stream in a first layer and a second modulated symbol stream in a second layer; and
a processor,
wherein
the processor is configured to:
demap the multiplexed signal, without removing the first modulated symbol stream from the multiplexed signal, to generate a bit likelihood stream in the second layer; and
perform error control decoding on the bit likelihood stream, and
in the demapping of the multiplexed signal, the processor is configured to demap the multiplexed signal such that:
(i) a polarity of a second in-phase component of the second modulated symbol stream is inverted when a polarity of a first in-phase component of the first modulated symbol stream is positive; and
(ii) a polarity of a second orthogonal component of the second modulated symbol stream is inverted when a polarity of a first orthogonal component of the first modulated symbol stream is positive.
|