US 11,742,367 B2
I-TOF pixel circuit for background light suppression
Seong Jin Kim, Gwangmyeong (KR); and Da Hwan Park, Incheon (KR)
Assigned to SK hynix Inc., Icheon (KR); and UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY), Ulsan (KR)
Filed by SK hynix Inc., Icheon (KR); and UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY), Ulsan (KR)
Filed on Nov. 19, 2021, as Appl. No. 17/531,599.
Claims priority of application No. 10-2021-0075011 (KR), filed on Jun. 9, 2021.
Prior Publication US 2022/0399385 A1, Dec. 15, 2022
Int. Cl. H01L 27/146 (2006.01); H04N 13/271 (2018.01); G01S 7/4863 (2020.01); G01S 7/487 (2006.01); G01S 17/894 (2020.01); H04N 25/705 (2023.01); H04N 25/445 (2023.01); H04N 25/71 (2023.01); H04N 25/75 (2023.01)
CPC H01L 27/14609 (2013.01) [H04N 13/271 (2018.05)] 17 Claims
OG exemplary drawing
 
1. A pixel circuit for background light suppression, the pixel circuit comprising:
a 2-tap pixel circuit including first and second pixel capacitors, first and second storage switches, and first and second transfer switches;
an in-pixel sigma delta circuit including a plurality of switching switches and a storage capacitor for storing charge transferred from the first and second pixel capacitors;
an adaptive sigma delta controller configured to determine switching states of the plurality of switching switches according to a first state of the first pixel capacitor, or a second state of the second pixel capacitor, or both; and
a chopping controller configured to instruct the storage switches and the transfer switches of the 2-tap pixel circuit to be selectively switched according to an output of the adaptive sigma delta controller.