US 11,742,331 B2
Method of manufacturing a semiconductor package including a dam structure surrounding a semiconductor chip mounting region
Minsoo Kim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Feb. 17, 2022, as Appl. No. 17/674,337.
Application 17/674,337 is a division of application No. 16/886,141, filed on May 28, 2020, granted, now 11,289,454.
Claims priority of application No. 10-2019-0127158 (KR), filed on Oct. 14, 2019.
Prior Publication US 2022/0173076 A1, Jun. 2, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 23/31 (2006.01)
CPC H01L 25/0657 (2013.01) [H01L 23/3128 (2013.01); H01L 25/18 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06586 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor package, the method comprising:
preparing a base substrate including a semiconductor chip mounting region;
forming a dam structure on the base substrate, the dam structure surrounding the semiconductor chip mounting region;
mounting a first semiconductor chip on the semiconductor chip mounting region of the base substrate, the first semiconductor chip having a first non-conductive film attached thereto;
applying a pressure to the first semiconductor chip such that the first non-conductive film is in contact with the dam structure;
stacking a second semiconductor chip on the first semiconductor chip, the second semiconductor chip having a second non-conductive film attached thereto; and
forming a molding member covering the base substrate, the first semiconductor chip, and the second semiconductor chip.