US 11,742,147 B2
Multilayer ceramic electronic component having specified standard deviation ratio for internal electrode and dielectric layer thicknesses
Tae Sung Kim, Suwon-si (KR); Hyeong Sik Yun, Suwon-si (KR); Woo Chul Shin, Suwon-si (KR); and Joon Woon Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed on Apr. 22, 2022, as Appl. No. 17/726,885.
Application 17/726,885 is a continuation of application No. 16/836,085, filed on Mar. 31, 2020, granted, now 11,342,121.
Claims priority of application No. 10-2019-0094257 (KR), filed on Aug. 2, 2019.
Prior Publication US 2022/0246358 A1, Aug. 4, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01G 4/30 (2006.01); H01G 4/12 (2006.01); H01G 4/012 (2006.01)
CPC H01G 4/30 (2013.01) [H01G 4/012 (2013.01); H01G 4/1218 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A multilayer ceramic electronic component, comprising:
a ceramic body comprising a dielectric layer; and
first and second internal electrodes disposed inside the ceramic body and disposed to oppose each other with the dielectric layer interposed therebetween,
wherein, when an average thickness of the dielectric layer is referred to as td and a standard deviation of a thickness of the dielectric layer in each position is referred to as σtd, while an average thickness of the first and second internal electrodes is referred to as to and a standard deviation of a thickness of a pre-determined region of any layer of the internal electrodes in each position is referred to as σte, a ratio (σte/σtd) of the standard deviation of the internal electrodes in each position to the standard deviation of the thickness of the dielectric layer in each position satisfies 0σte/σtd≤1.35, and
wherein the average thickness of the first and second internal electrodes is 0.41 μm or less.