CPC G11C 29/56016 (2013.01) [G01R 31/2863 (2013.01); G01R 31/2867 (2013.01); G01R 31/31905 (2013.01); G11C 2029/5602 (2013.01)] | 20 Claims |
1. A method of testing devices under test (DUTs), the method comprising:
loading an array of DUTs on a carrier comprising a plurality of membrane pockets operable to hold the array of DUTs;
moving the carrier to a slot of a rack associated with a tester using an elevator, wherein the tester comprises a plurality of racks, wherein each rack of the plurality of racks comprises a plurality of slots;
inserting the carrier into the slot of the rack;
affixing an interface board in the slot of the rack, wherein the interface board comprises a plurality of sockets, and wherein each socket of the plurality of sockets is operable to receive a respective device under test (DUT), and wherein each DUT in the array of DUTs aligns with a respective socket of the plurality of sockets on the interface board;
positioning a package-on-package (POP) memory array adjacent to the array of DUTs, wherein the POP memory array comprises an array of memory devices, wherein each memory device of the array of memory devices corresponds to a DUT in the array of DUTs; and
actuating a socket cover of a plurality of socket covers onto each respective memory device in the POP memory array and a corresponding DUT to push through a corresponding membrane pocket, to make physical and electrical contact with each respective socket of the plurality of sockets.
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