CPC G06F 30/3315 (2020.01) [G06F 30/27 (2020.01)] | 20 Claims |
1. A method of adjusting a digital circuit design, the method comprising:
selecting a first path in the digital circuit design, the first path comprising a plurality of gates;
generating a k-hop neighborhood graph of the first path, where k is a positive integer;
encoding the k-hop neighborhood graph into a state vector;
applying a machine learning model to the state vector to determine an adjustment to be made on a first gate of the plurality of gates; and
changing the first gate based on the adjustment.
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