US 11,741,187 B2
Calculation device, calculation method, and computer program product
Taro Kanao, Kawasaki Kanagawa (JP); Hayato Goto, Kawasaki Kanagawa (JP); Ryo Hidaka, Akishima Tokyo (JP); and Kosuke Tatsumura, Yokohama Kanagawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP)
Filed on Aug. 30, 2021, as Appl. No. 17/461,452.
Claims priority of application No. 2021-036688 (JP), filed on Mar. 8, 2021.
Prior Publication US 2022/0283780 A1, Sep. 8, 2022
Int. Cl. G06F 17/11 (2006.01)
CPC G06F 17/11 (2013.01) 9 Claims
OG exemplary drawing
 
1. A calculation device configured to solve a combinatorial optimization problem, the calculation device comprising:
a computing circuit comprising:
a first memory and a second memory storing a plurality of elements, wherein elements of the plurality of elements stored in the first memory are associated with a first variable and elements of the plurality of elements stored in the second memory are associated with a second variable; and
an updating circuit coupled to the first memory and the second memory, and configured to alternately update, for each of the plurality of elements, the first variable and the second variable, sequentially for unit times from an initial time to an end time; and
an output circuit coupled to the computing circuit and configured to output a solution to the combinatorial optimization problem based on the first variables of the plurality of elements at the end time, wherein
the plurality of elements correspond to a plurality of discrete variables of the combinatorial optimization problem,
the first variable and the second variable are each represented by a real number, and
the computing circuit is configured to: in an updating process for each of the unit times, for each of the plurality of elements,
output the first variable from the first memory to a first adder of the updating circuit to update the first variable based on the second variable;
output the second variable from the second memory to a second adder and a first multiplier of the updating circuit, the second adder updates the second variable based on the first variable, the first multiplier to calculate an acceleration value according to a predetermined computation;
generate a first enable signal by a determination circuit of the updating circuit when the first variable is smaller than a predetermined first value, change the first variable to the predetermined first value and change the second variable to a predetermined third value in response to the first enable signal;
generate a second enable signal by the determination circuit when the first variable is greater than a predetermined second value greater than the predetermined first value, change the first variable to the predetermined second value and change the second variable to the predetermined third value in response to the second enable signal; and
add, by a third adder of the updating circuit, the acceleration value to the second variable,
wherein the output circuit is configured to:
calculate, for each of the plurality of elements at the end time, a value of a discrete variable by binarizing the first variable with a preset threshold value, and
output the calculated values of the discrete variables as the solution to the combinatorial optimization problem.