CPC H04W 88/06 (2013.01) [H04B 7/0626 (2013.01); H04B 7/0695 (2013.01); H04B 7/088 (2013.01); H04L 5/0025 (2013.01); H04L 5/005 (2013.01); H04L 5/0092 (2013.01); H04W 56/001 (2013.01); H04W 76/27 (2018.02); H04W 80/02 (2013.01); H04W 80/08 (2013.01)] | 24 Claims |
1. An apparatus for a user equipment (UE), comprising:
memory to store information; and
processing circuitry coupled with the memory, the processing circuitry configured to:
determine a number of slots for a Tracking Reference Signal (TRS), wherein the number of slots is based on a subcarrier spacing of a bandwidth part (BWP) in a current component carrier for the UE and a minimum duration for accurate Doppler offset estimation; and
receive TRS based on the number of slots and a quasi co-location (QCL) relationship of the TRS, wherein the QCL relationship indicates that the TRS is Quasi-Co-Located (QCLed) with a Synchronization Signal (SS) block or a Channel State Information Reference Signal (CSI-RS).
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