CPC H04W 72/56 (2023.01) [H04L 5/0044 (2013.01); H04W 28/0263 (2013.01); H04W 28/0278 (2013.01); H04W 72/00 (2013.01); H04W 72/51 (2023.01); H04L 5/0064 (2013.01); H04L 5/0076 (2013.01); H04W 72/02 (2013.01); H04W 72/12 (2013.01)] | 13 Claims |
1. An integrated circuit for controlling a user equipment operable in a wireless communications system supporting direct communication between user equipments, the integrated circuit comprising:
control circuitry, which, in operation:
selects a sidelink destination group (ProSe destination) associated with a sidelink logical channel having a highest logical channel priority among sidelink logical channels, which have data available for transmission in a sidelink control period (SC period) and which have not previously been selected in the same sidelink control period, wherein each of the sidelink logical channels belongs to a sidelink destination group, each of the sidelink logical channels is allocated to a logical channel group (LCG) depending on a priority of said each sidelink logical channel and on a priority of the logical channel group, and the logical channel group is defined per sidelink destination group; and
allocates radio resources to sidelink logical channels belonging to the selected sidelink destination group in decreasing priority order; and
transmitting circuitry, which, in operation, transmits the data using the allocated radio resources.
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