US 12,068,400 B2
Bipolar junction transistors and methods of forming the same
Chun-Tsung Kuo, Tainan (TW); and Chuan-Feng Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTORMANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on May 4, 2022, as Appl. No. 17/737,003.
Prior Publication US 2023/0361204 A1, Nov. 9, 2023
Int. Cl. H01L 29/732 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/732 (2013.01) [H01L 29/0817 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/66272 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
depositing a first dielectric layer over a substrate;
depositing a first semiconductor layer on the first dielectric layer;
depositing a second semiconductor layer on the first semiconductor layer, wherein the first and second semiconductor layers comprise different materials;
depositing a second dielectric layer on the second semiconductor layer;
depositing a third dielectric layer on the second dielectric layer;
forming an opening in the first semiconductor layer, the second semiconductor layer, the first dielectric layer, the second dielectric layer, and the third dielectric layer to expose a portion of the substrate; and
forming a center portion of a lower base structure from the exposed portion of the substrate.