US 12,068,372 B2
Semiconductor device structure integrating air gaps and methods of forming the same
Chih-Ching Wang, Kinmen (TW); Kuan-Lun Cheng, Hsinchu (TW); and Wen-Hsing Hsieh, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Mar. 6, 2023, as Appl. No. 18/118,010.
Application 18/118,010 is a continuation of application No. 17/308,258, filed on May 5, 2021, granted, now 11,600,699.
Prior Publication US 2023/0207629 A1, Jun. 29, 2023
Int. Cl. H01L 29/08 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 27/088 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01)
CPC H01L 29/0847 (2013.01) [H01L 21/76846 (2013.01); H01L 23/528 (2013.01); H01L 23/53209 (2013.01); H01L 29/0653 (2013.01); H01L 29/41791 (2013.01); H01L 29/4236 (2013.01); H01L 2924/13067 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a substrate having a front side and a back side opposing the front side;
a gate stack disposed on the front side of the substrate;
a first source/drain feature and a second source/drain feature disposed in opposing sides of the gate stack, each first source/drain feature and second source/drain feature comprises a first side and a second side;
a contact etch stop layer (CESL) in contact with the first side of the first source/drain feature; and
a conductive feature in contact with the second side of the first source/drain feature,
wherein a portion of the back side of the substrate and the conductive feature are exposed to an air gap.