CPC H01L 27/124 (2013.01) [G06F 3/041 (2013.01); G06F 3/0412 (2013.01); G06F 3/04164 (2019.05); G06F 3/0443 (2019.05); H01L 27/1288 (2013.01); G06F 2203/04103 (2013.01)] | 13 Claims |
2. A touch array substrate, comprising a substrate and a buffer layer disposed on the substrate, wherein the touch array substrate comprises:
an active layer disposed on the buffer layer, wherein the active layer comprises a first region corresponding to a source electrode of a thin film transistor and a second region corresponding to a drain electrode of the thin film transistor;
an insulating layer disposed on the active layer and covering the active layer and the buffer layer;
a pixel electrode layer disposed on the insulating layer, wherein the pixel electrode layer comprises a pixel electrode and a plurality of base layers disposed on a same layer as the pixel electrode;
a metal layer correspondingly stacked on the plurality of base layers of the pixel electrode layer, wherein the metal layer comprises a touch signal line, a data line, a gate electrode, and a gate line;
a planarization layer disposed on the metal layer and covering the metal layer, the pixel electrode, and the insulating layer; and
a common electrode layer disposed on the planarization layer,
wherein the common electrode layer comprises a touch electrode, the source electrode, and the drain electrode, the touch electrode is connected to the touch signal line, an end of the source electrode is connected to the first region, another end of the source electrode is connected to the data line, an end of the drain electrode is connected to the second region, and another end of the drain electrode is connected to the pixel electrode.
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