US 12,068,323 B2
Semiconductor devices and methods for fabricating the same
Deok Han Bae, Suwon-si (KR); Ju Hun Park, Seoul (KR); Myung Yoon Um, Seoul (KR); Ye Ji Lee, Seoul (KR); and Yoon Young Jung, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Oct. 27, 2021, as Appl. No. 17/511,923.
Claims priority of application No. 10-2021-0021795 (KR), filed on Feb. 18, 2021.
Prior Publication US 2022/0262797 A1, Aug. 18, 2022
Int. Cl. H01L 27/092 (2006.01); H01L 23/528 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01)
CPC H01L 27/0924 (2013.01) [H01L 23/528 (2013.01); H01L 29/0665 (2013.01); H01L 29/41791 (2013.01); H01L 29/42392 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate including a first power supply region and a second power supply region, and a cell region that extends between the first power supply region and the second power supply region;
a first active region and a second active region extending side-by-side in a first direction, within the cell region;
a first power supply wiring extending in the first direction within the first power supply region;
a first source/drain contact which connects the first active region and the second active region; and
a second source/drain contact which connects the first active region and the first power supply wiring;
wherein the first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region;
wherein the second source/drain contact includes a second recess portion disposed inside the first power supply region; and
wherein a lowermost surface of the first recess portion is higher than a lowermost surface of the second recess portion, relative to an upper surface of the substrate.