US 12,068,319 B2
High performance semiconductor oxide material channel regions for NMOS
Gilbert Dewey, Beaverton, OR (US); Willy Rachmady, Beaverton, OR (US); Jack T. Kavalieros, Portland, OR (US); Cheng-Ying Huang, Portland, OR (US); Matthew V. Metz, Portland, OR (US); Sean T. Ma, Portland, OR (US); Harold Kennel, Portland, OR (US); Tahir Ghani, Portland, OR (US); and Abhishek A. Sharma, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by INTEL CORPORATION, Santa Clara, CA (US)
Filed on Sep. 25, 2018, as Appl. No. 16/141,000.
Prior Publication US 2020/0098753 A1, Mar. 26, 2020
Int. Cl. H01L 27/092 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/10 (2006.01); H01L 29/267 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01)
CPC H01L 27/092 (2013.01) [H01L 21/02164 (2013.01); H01L 21/02175 (2013.01); H01L 21/022 (2013.01); H01L 21/28194 (2013.01); H01L 29/1054 (2013.01); H01L 29/267 (2013.01); H01L 29/517 (2013.01); H01L 29/66537 (2013.01); H01L 29/6659 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit structure, comprising:
a substrate comprising a semiconductor material;
a first fin comprising a semiconductor oxide material, the semiconductor oxide material of the first fin having a bottommost surface on and in direct contact with the semiconductor material of the substrate, the semiconductor oxide material having a composition different than a composition of the semiconductor material of the substrate, and the semiconductor oxide material including oxygen and one or more of indium (In), gallium (Ga), zinc (Zn), copper (Cu), tin (Sn), nickel (Ni), titanium (Ti), aluminum (Al), or antimony (Sb);
a first gate structure over the first fin and in contact with the semiconductor oxide material, the first gate structure being part of an NMOS transistor device;
a second fin comprising the semiconductor material of the substrate, the second fin continuous with the semiconductor material of the substrate; and
a second gate structure over the second fin and in contact with the semiconductor material of the second fin, the second gate structure being part of a PMOS device.