US 12,068,309 B2
Semiconductor device and method for fabricating the same
Chih-Kai Hsu, Tainan (TW); Ssu-I Fu, Kaohsiung (TW); Yu-Hsiang Lin, New Taipei (TW); Chien-Ting Lin, Tainan (TW); Chia-Jung Hsu, Tainan (TW); Chun-Ya Chiu, Tainan (TW); and Chin-Hung Chen, Tainan (TW)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Jan. 27, 2022, as Appl. No. 17/585,582.
Claims priority of application No. 202111552301.1 (CN), filed on Dec. 17, 2021.
Prior Publication US 2023/0197710 A1, Jun. 22, 2023
Int. Cl. H01L 27/02 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 27/0266 (2013.01) [H01L 29/0653 (2013.01); H01L 29/41791 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 17 Claims
OG exemplary drawing
 
9. A semiconductor device, comprising:
a substrate having a high-voltage (HV) region, a medium-voltage (MV) region, and a low-voltage (LV) region;
a HV device on the HV region, wherein the HV device comprises:
a first base on the substrate;
a first gate dielectric layer on the first base;
a first gate electrode on the first gate dielectric layer;
a LV device on the LV region, wherein the LV device comprises:
a fin-shaped structure on the substrate;
a second gate electrode on the fin-shaped structure, wherein a top surface of the first gate dielectric layer is lower than a top surface of the fin-shaped structure.