US 12,068,298 B2
High power density 3D semiconductor module packaging
Yangang Wang, Lincolnshire (GB); Haihui Luo, Hunan (CN); and Guoyou Liu, Hunan (CN)
Assigned to DYNEX SEMICONDUCTOR LIMITED, Lincolnshire (GB); and ZHUZHOU CRRC TIMES ELECTRIC CO. LTD., Zhuzhou (CN)
Appl. No. 17/430,754
Filed by Dynex Semiconductor Limited, Lincolnshire (GB); and Zhuzhou CRRC Times Semiconductor Co. Ltd., Hunan (CN)
PCT Filed Nov. 2, 2020, PCT No. PCT/CN2020/125889
§ 371(c)(1), (2) Date Aug. 13, 2021,
PCT Pub. No. WO2022/088179, PCT Pub. Date May 5, 2022.
Prior Publication US 2022/0352137 A1, Nov. 3, 2022
Int. Cl. H01L 25/18 (2023.01); H01L 23/00 (2006.01); H01L 23/24 (2006.01); H01L 25/00 (2006.01); H01L 25/07 (2006.01)
CPC H01L 25/18 (2013.01) [H01L 25/071 (2013.01); H01L 25/50 (2013.01); H01L 23/24 (2013.01); H01L 24/32 (2013.01); H01L 24/33 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/33181 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/15747 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device sub-assembly comprising:
at least two power semiconductor devices; and
a contact of a first type, wherein a first power semiconductor device is located on a first side of the contact of a first type, and wherein a second power semiconductor device is located on a second side of the contact of a first type, wherein the second side is opposite to the first side;
at least two contacts of a second type, wherein one of the contacts of a second type is connected to a top side of the first power semiconductor device and another of the contacts of a second type is connected to a bottom side of the second power semiconductor device; and
a spacer, wherein the contacts of a second type are electrically connected to each other using the spacer.