US 12,068,245 B2
Memory device, semiconductor device, and manufacturing method thereof
TsuChing Yang, Taipei (TW); Hung-Chang Sun, Kaohsiung (TW); Sheng-Chih Lai, Hsinchu County (TW); Yu-Wei Jiang, Hsinchu (TW); and Kuo-Chang Chiang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Dec. 21, 2022, as Appl. No. 18/086,569.
Application 18/086,569 is a continuation of application No. 17/185,984, filed on Feb. 26, 2021, granted, now 11,569,165.
Claims priority of provisional application 63/057,892, filed on Jul. 29, 2020.
Prior Publication US 2023/0120530 A1, Apr. 20, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H10B 51/20 (2023.01); H10B 51/30 (2023.01); H10B 51/40 (2023.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5283 (2013.01); H10B 51/20 (2023.02); H10B 51/30 (2023.02); H10B 51/40 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a stacked structure comprising a plurality of memory cells;
first flights of steps disposed at an end of the stacked structure along a first direction; and
second flights of steps adjacent to the first flights of steps disposed at the end of the stacked structure along the first direction,
wherein the first flights of steps and the second flights of steps comprise first portions and second portions alternately disposed along the first direction,
the second portions are wider than the first portions along a second direction.