CPC H01L 21/28123 (2013.01) [H01L 21/02164 (2013.01); H01L 21/02238 (2013.01); H01L 21/02274 (2013.01); H01L 21/0228 (2013.01); H01L 21/31053 (2013.01); H01L 21/76227 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01)] | 20 Claims |
1. A semiconductor device, comprising:
a semiconductor fin extending from a substrate;
an isolation region surrounding a lower portion of the semiconductor fin;
a metal gate structure on the semiconductor fin and the isolation region, the metal gate structure being disposed in an interlayer dielectric layer; and
an isolation structure disposed in the metal gate structure, the isolation structure separating the metal gate structure into two distinct portions, the isolation structure comprising:
a conformal silicon nitride layer extending along sidewalls of the two distinct portions of the metal gate structure;
a conformal silicon layer on the conformal silicon nitride layer; and
a silicon oxide layer on the conformal silicon layer.
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