CPC G09G 3/3233 (2013.01) [G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2330/021 (2013.01)] | 10 Claims |
1. A pixel circuit, comprising:
a light emitting element;
a first transistor connected to the light emitting element in series, wherein the first transistor and the light emitting element are disposed between a first power and a second power, and the first transistor is configured to control a driving current pass through the light emitting element base on a voltage of a gate of the first transistor;
a second transistor connected to the first transistor, wherein the second transistor is cutoff in a display scan period of a frame period and turning on in a self scan period of the frame period to reset the first transistor in the self scan period of the frame period based on a time voltage signal provided from a time voltage line, wherein a gate of the second transistor is electrically connected to the time voltage line, a source of the second transistor is electrically connected to a reset power, a drain of the second transistor is electrically connected to a source of the first transistor or a drain of the first transistor;
a third transistor, wherein a gate of the third transistor is electrically connected to a first scan line, a source of the third transistor is electrically connected to the source of the first transistor, and a drain of the third transistor is electrically connected to the gate of the first transistor;
a fourth transistor, wherein a gate of the fourth transistor is electrically connected to a second scan line, a source of the fourth transistor is electrically connected to a first initial power, and a drain of the fourth transistor is electrically connected to the drain of the first transistor;
a fifth transistor, wherein a gate of the fifth transistor is electrically connected to a third scan line, a source of the fifth transistor is electrically connected to a data line, and a drain of the fifth transistor is electrically connected to the source of the first transistor;
a sixth transistor, wherein a gate of the sixth transistor is electrically connected to the third scan line, a source of the sixth transistor is electrically connected to a second initial power, and a drain of the sixth transistor is electrically connected to an anode of the light emitting element, and wherein a cathode of the light emitting element is electrically connected to the second power;
a seventh transistor, wherein a gate of the seventh transistor is electrically connected to an emitting control line, a source of the seventh transistor is electrically connected to the first power, and a drain of the seventh transistor is electrically connected to the source of the first transistor;
an eighth transistor, wherein a gate of the eighth transistor is electrically connected to the emitting control line, a source of the eighth transistor is electrically connected to the drain of the first transistor, and a drain of the eighth transistor is electrically connected to the anode of the light emitting element;
a capacitor, wherein one end of the capacitor is electrically connected to the first power, and another end of the capacitor is electrically to the gate of the first transistor; and
a ninth transistor, wherein a gate of the ninth transistor is electrically connected to the time voltage line, a source of the ninth transistor is electrically connected to the second initial power, and a drain of the ninth transistor is electrically connected to the anode of the light emitting element.
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