CPC G09G 3/2096 (2013.01) [G09G 2340/0428 (2013.01); G09G 2370/08 (2013.01)] | 18 Claims |
1. A display apparatus, comprising:
a display panel, wherein resolution of the display panel is A*B, A is a number of pixel rows, B is a number of pixel columns, and both A and B are positive integers;
N2 data drives, electrically connected to the display panel, wherein each data drive comprises an input video interface, a rate of each input video interface is M2 Gbps, and N2 is a positive integer; and
a timing controller, wherein resolution of the timing controller is C*D, C is a number of each row of pixel data, D is a number of each column of pixel data, both C and D are positive integers, C is less than A, D is less than B, the timing controller comprises N1 output video interfaces, a rate of each output video interface is M1 Gbps, and each output video interface transmits video data to a plurality of input video interfaces in a time-sharing manner;
wherein each output video interface transmits video data to E input video interfaces in a time-sharing manner, and E is determined according to the following formula:
E=M2*N2/(J*K)/(M1*N1),
wherein J=B/D, K=A/C, and both J and K are positive integers.
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