US 12,067,640 B2
Dynamically reconfigurable register file
Pramod Vasant Argade, San Diego, CA (US); Martin G. Sarov, San Diego, CA (US); and Milind N. Nemlekar, San Diego, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Mar. 26, 2021, as Appl. No. 17/214,762.
Prior Publication US 2022/0309606 A1, Sep. 29, 2022
Int. Cl. G06T 1/20 (2006.01); G06F 9/30 (2018.01); G06F 9/52 (2006.01); G06T 1/60 (2006.01)
CPC G06T 1/20 (2013.01) [G06F 9/30105 (2013.01); G06F 9/3012 (2013.01); G06F 9/524 (2013.01); G06T 1/60 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A method for managing register allocation, the method comprising:
detecting a first request from a first wavefront to allocate first registers for the first wavefront while the first wavefront is executing;
first determining, based on allocation information, that allocating the first registers to the first wavefront would result in a condition in which a deadlock is possible, wherein the first determining includes determining, after allocating the first registers, that at least one wavefront other than the first wavefront would be able to be allocated a sufficient number of registers remaining unallocated after the allocating of the first registers to complete;
in response to the first determining, refraining from allocating the first registers to the first wavefront;
detecting a second request from a second wavefront to allocate second registers for the second wavefront while the second wavefront is executing;
second determining, based on the allocation information, that allocating the second registers to the second wavefront would result in a condition in which deadlock is not possible; and
in response to the second determining, allocating the second registers to the second wavefront.