US 12,067,457 B2
Cascade protocol for iSWAP gate in a two-qubit system
Vadim Smelyanskiy, Rancho Palos Verdes, CA (US); Andre Petukhov, Rapid City, SD (US); Rami Barends, Goleta, CA (US); and Sergio Boixo Castrillo, Rancho Palos Verdes, CA (US)
Assigned to Google LLC, Mountain View, CA (US)
Appl. No. 16/981,075
Filed by Google LLC, Mountain View, CA (US)
PCT Filed Jan. 31, 2019, PCT No. PCT/US2019/016032
§ 371(c)(1), (2) Date Sep. 15, 2020,
PCT Pub. No. WO2020/106312, PCT Pub. Date May 28, 2020.
Claims priority of provisional application 62/769,426, filed on Nov. 19, 2018.
Prior Publication US 2021/0272001 A1, Sep. 2, 2021
Int. Cl. H03K 19/195 (2006.01); G06N 10/00 (2022.01); G06N 10/20 (2022.01); G06N 10/60 (2022.01)
CPC G06N 10/00 (2019.01) [G06N 10/20 (2022.01); G06N 10/60 (2022.01)] 19 Claims
OG exemplary drawing
 
1. A method for implementing an iSWAP quantum logic gate between a first qubit and a second qubit, the method comprising:
implementing a cascade schedule that defines a trajectory of a detuning between a frequency of the first qubit and a frequency of the second qubit, the trajectory of the detuning implementing the iSWAP gate between the first qubit and the second qubit, comprising:
during a first stage of the trajectory of the detuning, adiabatically driving the detuning between the frequency of the first qubit and the frequency of the second qubit through a first avoided crossing in a leakage channel;
during a second stage of the trajectory of the detuning that is subsequent to the first stage, driving the detuning between the frequency of the first qubit and the frequency of the second qubit through a second avoided crossing in a swap channel;
during a third stage of the trajectory of the detuning that is subsequent to the second stage, evolving the first qubit and second qubit;
during a fourth stage of the trajectory of the detuning that is subsequent to the third stage, implementing the second stage in reverse order; and
during a fifth stage of the trajectory of the detuning that is subsequent to the fourth stage, implementing the first stage in reverse order.