CPC G06F 9/5011 (2013.01) [B60W 50/00 (2013.01); G05D 1/0212 (2013.01); G06N 20/00 (2019.01); G08G 1/20 (2013.01); G08G 1/202 (2013.01)] | 20 Claims |
1. A computer system for performing a set of hardware-specific tuning tasks with respect to a machine learning (ML) model, the computer system comprising:
a memory storing a scheduler circuit, wherein the scheduler circuit operates in accordance with machine readable instructions;
the scheduler circuit in communication with a job manager at an agent circuit, wherein the job manager receives a scheduling request message from the scheduler circuit and executes a scheduled autotuning stage; and
one or more processors configured to access the memory and execute the machine readable instructions stored to:
initiate, by the scheduler circuit, a first portion of a task with a graphics processing unit (GPU) or a central processing unit (CPU) based on a scheduling policy;
schedule, by the scheduler circuit, a second portion of the task with the GPU or the CPU based on the scheduling policy, wherein the scheduling utilizes the GPU or the CPU while the GPU or the CPU is not in use from the first portion of the task;
upon the job manager executing the scheduled autotuning stage and measuring an execution time associated with execution of the scheduled autotuning stage, receive, by the scheduling circuit, an update to an autotuning task metric from the execution of the scheduled autotuning stage, wherein the scheduled autotuning stage comprises a select stage, a build stage, a profile stage, or an update stage; and
update, by the scheduler circuit, the autotuning task metric based at least in part on the received update.
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