| CPC G06F 3/0658 (2013.01) [G06F 3/0614 (2013.01); G06F 3/0679 (2013.01); G11C 16/0483 (2013.01)] | 20 Claims |
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1. A memory controller configured to control a memory device, the memory controller comprising:
a processor configured to control a memory operation on the memory device, wherein the processor is further configured to apply a plurality of read levels to a plurality of memory cells of the memory device to obtain a plurality of cell count values, and a first read level of the plurality of read levels causes first memory cells of the plurality of memory cells to turn on; and
a read level calculation module configured to:
receive N counting values corresponding to N read levels generated based on a counting operation on data read by using the plurality of read levels, wherein the N counting values correspond to the plurality of cell count values,
model at least two cell count functions having selected read levels that are selected from the N read levels as inputs, and counting values corresponding to the selected read levels as outputs, wherein coefficients of the at least two cell count functions are based on the respective selected read levels, and
calculate an optimal read level based on an optimal cell count function selected from the at least two cell count functions, wherein N is an integer equal to or greater than four,
wherein the N counting values comprise counting values corresponding to at least four different read levels.
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