US 12,067,264 B2
Power efficient codeword scrambling in a non-volatile memory device
Eyal En Gad, Santa Clara, CA (US); Zhengang Chen, San Jose, CA (US); and Yoav Weinberg, Toronto (CA)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 1, 2022, as Appl. No. 17/829,920.
Prior Publication US 2023/0393765 A1, Dec. 7, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0623 (2013.01) [G06F 3/0655 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
receiving a request to perform a memory access operation on the memory device;
determining a memory segment identifier associated with a physical portion of the memory device to which the memory access operation is directed;
applying a hash function to the memory segment identifier to generate a hashed seed based on the memory segment identifier;
providing the hashed seed based on the memory segment identifier to a pseudo-random number generator to generate a randomized string; and
performing the memory access operation on the memory device using the randomized string.