| CPC G06F 3/0619 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0673 (2013.01)] | 23 Claims |
|
18. A method of operating a memory device, the method comprising:
designating a plurality of memory cell groups including a predetermined number of memory cells having successive physical column addresses;
applying program voltages increasing gradually to the plurality of memory cell groups through word lines;
determining application times of program permission voltages applied to the plurality of memory cell groups, respectively, and magnitudes of the program permission voltages on the basis of a magnitude of the program voltages; and
applying the program permission voltages to the plurality of memory cell groups through bit lines.
|