US 12,066,969 B2
IC with adaptive chip-to-chip interface to support different chip-to-chip
Krishnan Srinivasan, San Jose, CA (US); Sagheer Ahmad, Cupertino, CA (US); Ygal Arbel, Morgan Hill, CA (US); and Millind Mittal, Saratoga, CA (US)
Assigned to XILINX, INC., San Jose, CA (US)
Filed by XILINX, INC., San Jose, CA (US)
Filed on Jan. 31, 2022, as Appl. No. 17/589,633.
Prior Publication US 2023/0244628 A1, Aug. 3, 2023
Int. Cl. G06F 13/42 (2006.01); G06F 13/38 (2006.01); G06F 13/40 (2006.01)
CPC G06F 13/42 (2013.01) [G06F 13/382 (2013.01); G06F 13/4063 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) die, comprising:
an adaptive chip-to-chip (C2C) interface comprising a mux and a de-mux for supporting a plurality of different C2C protocols to communicate with an external IC die using a C2C connection, wherein each of the plurality of different C2C protocols corresponds to a different data path of a plurality of data paths and wherein, during boot time, the adaptive C2C interface is configured to perform only one of the plurality of different C2C protocols that is in common with the external IC die to communicate with the external IC die; and
processing circuitry coupled to the adaptive C2C interface and configured, during runtime, to use the adaptive C2C interface to communicate with the external IC die, wherein the IC die and the external IC die are components of a chip-to-chip configuration.