US 12,066,943 B1
Alias processing method and system based on L1D-L2 caches and related device
Muyang Liu, Shenzhen (CN); Rong Chen, Shenzhen (CN); and Zhilei Yang, Shenzhen (CN)
Assigned to Rivai Technologies (Shenzhen) Co., Ltd., Shenzhen (CN)
Appl. No. 18/689,068
Filed by RIVAI TECHNOLOGIES (SHENZHEN) CO., LTD., Shenzhen (CN)
PCT Filed Nov. 20, 2023, PCT No. PCT/CN2023/132629
§ 371(c)(1), (2) Date Mar. 4, 2024,
.
Claims priority of application No. 202310707262.0 (CN), filed on Jun. 15, 2023.
Int. Cl. G06F 12/08 (2016.01); G06F 12/0811 (2016.01)
CPC G06F 12/0811 (2013.01) 10 Claims
OG exemplary drawing
 
1. An alias processing method based on first-level data (L1D)-second level (L2) caches, comprising the following steps of:
establishing a tag copy random access memory used for copying a tag random access memory in the L1D cache, wherein the tag random access memory and the tag copy random access memory are both composed of a plurality of data sets;
establishing a valid array, and marking a data validity of each data set in the tag copy random access memory with the valid array;
acquiring a check request sent by the L1D cache, wherein the check request is sent in response to the L1D cache requests data from the L2 cache; and
checking in the tag copy random access memory based on the valid array, and determining whether the check request hits the data set in the tag copy random access memory, in response to the check request hits the data set;
invalidating the check request in the L2 cache, and saving the check request; and
sending a flush request with a physical address corresponding to the check request to the LID cache, wherein the flush request is used for deleting a data set corresponding to the physical address in the L1D cache.