US 12,066,895 B2
Heterogenous memory accommodating multiple erasure codes
John Hayes, Mountain View, CA (US); John Colgrove, Los Altos, CA (US); Robert Lee, Pebble Beach, CA (US); Igor Ostrovsky, Mountain View, CA (US); and Joshua Robinson, Madrid (ES)
Assigned to PURE STORAGE, INC., Santa Clara, CA (US)
Filed by PURE STORAGE, INC., Mountain View, CA (US)
Filed on Feb. 27, 2023, as Appl. No. 18/175,422.
Application 18/175,422 is a continuation of application No. 17/327,250, filed on May 21, 2021, granted, now 11,593,203.
Application 17/327,250 is a continuation of application No. 16/422,755, filed on May 24, 2019, granted, now 11,036,583, issued on Jun. 15, 2021.
Application 16/422,755 is a continuation of application No. 15/315,676, granted, now 10,303,547, issued on May 28, 2019, previously published as PCT/US2015/034291, filed on Jun. 4, 2015.
Application 15/315,676 is a continuation of application No. 14/296,160, filed on Jun. 4, 2014, granted, now 9,218,244, issued on Dec. 22, 2015.
Prior Publication US 2023/0205631 A1, Jun. 29, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 11/14 (2006.01)
CPC G06F 11/1076 (2013.01) [G06F 11/108 (2013.01); G06F 11/1088 (2013.01); G06F 11/1096 (2013.01); G06F 11/1415 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A storage system, comprising:
a plurality of storage nodes configured to communicate together, at least one of the plurality of storage nodes having non-volatile memory with differing capacities, wherein the plurality of storage nodes are configured to recover data written according to a first erasure coding scheme and write the recovered data according to a second erasure coding scheme.