US 12,066,671 B2
Semiconductor devices with vertically stacked and laterally offset intermediate waveguides
Cheng-Tse Tang, Hsinchu (TW); Chewn-Pu Jou, Hsinchu (TW); Chih-Wei Tseng, Hsinchu (TW); Hsing-Kuo Hsia, Jhubei (TW); and Ming Yang Chung, Kaohsiung (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 26, 2022, as Appl. No. 17/826,098.
Claims priority of provisional application 63/298,900, filed on Jan. 12, 2022.
Prior Publication US 2023/0221511 A1, Jul. 13, 2023
Int. Cl. G02B 6/42 (2006.01); G02B 6/43 (2006.01)
CPC G02B 6/4283 (2013.01) [G02B 6/4238 (2013.01); G02B 6/43 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a plurality of intermediate waveguides;
wherein the plurality of intermediate waveguides are vertically disposed on top of one another, and vertically adjacent ones of the plurality of intermediate waveguides are laterally offset from each other; and
wherein, when viewed from the top, each of the plurality of intermediate waveguides essentially consists of a first portion and a second portion, the first portion has a first varying width that increases from a first end of the corresponding intermediate waveguide to a middle of the corresponding intermediate waveguide, and the second portion has a second varying width that decreases from the middle of the corresponding intermediate waveguide to a second end of the corresponding intermediate waveguide.