US 12,066,659 B2
Protective ring structure to increase waveguide performance
Yung-Chang Chang, Taipei (TW); and Meng-Han Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on May 26, 2023, as Appl. No. 18/324,212.
Application 17/735,383 is a division of application No. 16/806,043, filed on Mar. 2, 2020, granted, now 11,333,827, issued on May 17, 2022.
Application 18/324,212 is a continuation of application No. 17/735,383, filed on May 3, 2022, granted, now 11,703,642.
Prior Publication US 2023/0296839 A1, Sep. 21, 2023
Int. Cl. G02B 6/124 (2006.01); G02B 6/136 (2006.01); H01L 23/48 (2006.01); G02B 6/12 (2006.01)
CPC G02B 6/124 (2013.01) [G02B 6/136 (2013.01); H01L 23/48 (2013.01); G02B 6/12002 (2013.01); G02B 6/12004 (2013.01); G02B 6/12019 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated chip, comprising:
an optical device disposed on a substrate;
a dielectric structure over the substrate, wherein the dielectric structure comprises one or more sidewalls defining a light channel over a region of the optical device;
a first dielectric layer on the dielectric structure; and
a protective structure above the optical device and disposed on opposing sides of the light channel, wherein the first dielectric layer overlies the protective structure and contacts an inner sidewall of the protective structure.