CPC A61N 1/36067 (2013.01) [A61B 5/0006 (2013.01); A61B 5/30 (2021.01); A61B 5/316 (2021.01); A61N 1/0534 (2013.01); A61N 1/16 (2013.01); A61N 1/3605 (2013.01); A61N 1/36125 (2013.01); A61N 1/36135 (2013.01)] | 25 Claims |
1. A neural input signal acquisition module comprising:
a front-end block configured to amplify differences between neural input signals (V1a, V2a) received by the acquisition module and to filter out frequencies above a predefined frequency band to suppress stimulation artifacts in the neural input signals,
wherein the front-end block comprises a multi-stage fully-differential switched capacitor circuit configured for discrete-time signal processing.
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