CPC H10B 43/27 (2023.02) [H01L 21/8221 (2013.01); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 43/35 (2023.02)] | 18 Claims |
1. A memory array comprising strings of memory cells, comprising:
laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers, operative channel-material strings of memory cells extending through the insulative tiers and the conductive tiers, a conductor tier below the stack and comprising an upper conductor material and a lower conductor material, the channel-material strings of memory cells comprising a channel material having a bottom surface in direct physical contact with the upper conductor material; and
an intervening material laterally-between and longitudinally-alongside immediately-laterally-adjacent of the memory blocks, the intervening material comprising a horizontally-elongated conductor material directly electrically coupled to the conductor tier, the horizontally-elongated conductor material being of different composition from the lower conductor material, the horizontally-elongated conductor material having a top that is below a bottom of conducting material of a lowest of the conductive tiers.
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