US 11,735,511 B2
Semiconductor device
Hiroaki Matsubara, Kyoto (JP); Kaori Sumitomo, Kyoto (JP); Maki Moroi, Kyoto (JP); and Naoki Kinoshita, Kyoto (JP)
Assigned to ROHM CO., LTD., Kyoto (JP)
Filed by ROHM CO., LTD., Kyoto (JP)
Filed on Jul. 1, 2021, as Appl. No. 17/365,065.
Claims priority of application No. 2020-123072 (JP), filed on Jul. 17, 2020.
Prior Publication US 2022/0020678 A1, Jan. 20, 2022
Int. Cl. H01L 23/498 (2006.01)
CPC H01L 23/49844 (2013.01) [H01L 23/49811 (2013.01); H01L 23/49822 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a chip;
a circuit element formed in the chip;
an insulating layer formed over the chip so as to cover the circuit element;
a multilayer wiring region formed in the insulating layer and including a plurality of wirings laminated and arranged in a thickness direction of the insulating layer so as to be electrically connected to the circuit element;
at least one insulating region which does not include the wirings in an entire region in the thickness direction of the insulating layer and is formed in a region outside the multilayer wiring region in the insulating layer;
at least one terminal electrode disposed over the insulating layer so as to face the chip with the at least one insulating region interposed between the at least one terminal electrode and the chip; and
a rectifier including an anode region formed in a region outside the circuit element in a surface layer portion of the chip and a cathode region formed in a surface layer portion of the anode region,
wherein the at least one insulating region is formed in a portion of the insulating layer that covers the rectifier, and
wherein the at least one terminal electrode faces the rectifier.