US 11,735,424 B2
Semiconductor device and manufacturing method thereof
Yasunori Agata, Matsumoto (JP); Takashi Yoshimura, Matsumoto (JP); Hiroshi Takishita, Matsumoto (JP); Misaki Meguro, Matsumoto (JP); Naoko Kodama, Matsumoto (JP); Yoshihiro Ikura, Matsumoto (JP); Seiji Noguchi, Matsumoto (JP); Yuichi Harada, Matsumoto (JP); and Yosuke Sakurai, Azumino (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kanagawa (JP)
Filed by FUJI ELECTRIC CO., LTD., Kanagawa (JP)
Filed on May 18, 2022, as Appl. No. 17/748,006.
Application 17/748,006 is a continuation of application No. 17/033,925, filed on Sep. 28, 2020, granted, now 11,342,186.
Application 17/033,925 is a continuation of application No. PCT/JP2019/040241, filed on Oct. 11, 2019.
Claims priority of application No. 2018-196766 (JP), filed on Oct. 18, 2018; application No. 2018-248523 (JP), filed on Dec. 28, 2018; and application No. 2019-159499 (JP), filed on Sep. 2, 2019.
Prior Publication US 2022/0277959 A1, Sep. 1, 2022
Int. Cl. H01L 27/06 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/739 (2006.01); H01L 21/22 (2006.01); H01L 21/265 (2006.01); H01L 21/268 (2006.01); H01L 29/32 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/861 (2006.01)
CPC H01L 21/221 (2013.01) [H01L 21/268 (2013.01); H01L 21/26526 (2013.01); H01L 27/0664 (2013.01); H01L 29/0623 (2013.01); H01L 29/1095 (2013.01); H01L 29/32 (2013.01); H01L 29/404 (2013.01); H01L 29/66348 (2013.01); H01L 29/7397 (2013.01); H01L 29/8613 (2013.01)] 33 Claims
OG exemplary drawing
 
1. A semiconductor device comprising a semiconductor substrate including an upper surface and a lower surface, the semiconductor device further comprising:
a drift region of a first conductivity type provided on the semiconductor substrate;
a base region of a second conductivity type provided between the drift region and the upper surface;
a high concentration region of the first conductivity type or the second conductivity type provided in contact with the lower surface in the semiconductor substrate; and
a buffer region of the first conductivity type provided between the high concentration region and the drift region, the buffer region having one or more donor concentration peaks whose donor concentration is higher than the drift region, wherein
a donor concentration of the drift region is higher than a base doping concentration of the semiconductor substrate, entirely over the drift region in a depth direction connecting the upper surface and the lower surface.