US 11,735,267 B2
Managing pre-programming of a memory device for a reflow process
Ji-Hye Shin, Palo Alto, CA (US); Foroozan S. Koushan, San Jose, CA (US); Tomoko Iwasaki, San Jose, CA (US); and Jayasree Nayar, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 12, 2021, as Appl. No. 17/373,701.
Application 17/373,701 is a continuation of application No. 16/714,369, filed on Dec. 13, 2019, granted, now 11,069,412.
Prior Publication US 2021/0343346 A1, Nov. 4, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/00 (2006.01); G11C 16/12 (2006.01); G11C 16/34 (2006.01); G06F 3/06 (2006.01); G11C 16/26 (2006.01)
CPC G11C 16/12 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G11C 16/3459 (2013.01); G11C 16/26 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, the processing device configured to perform operations comprising:
determining a verify reference voltage associated with a logic state of a memory cell of the memory device, the verify reference voltage defining a target voltage level of a threshold voltage associated with the logic state;
determining an amount of voltage compensation based on a thermal profile associated with a heat to be applied to the memory device, the thermal profile comprising a temperature associated with the heat and a period of time the heat is to be applied to the memory device; and
updating the verify reference voltage using the amount of voltage compensation for an expected shift in the threshold voltage of the memory cell after the heat is applied to the memory device.