US 11,735,253 B2
Apparatus and methods for programming memory cells responsive to an indication of age of the memory cells
Pin-Chou Chiang, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Jul. 16, 2021, as Appl. No. 17/377,566.
Application 17/377,566 is a division of application No. 16/225,036, filed on Dec. 19, 2018, granted, now 11,081,170.
Prior Publication US 2021/0343335 A1, Nov. 4, 2021
Int. Cl. G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01)
CPC G11C 11/5628 (2013.01) [G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/3495 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of operating a memory, comprising:
determining a memory cell age of a plurality of memory cells, wherein each memory cell of the plurality of memory cells has an erased data state of a plurality of data states;
determining a desired programming step voltage for programming memory cells having the determined memory cell age; and
after determining the desired programming step voltage, performing a programming operation on the plurality of memory cells comprising applying a plurality of programming pulses to control gates of the plurality of memory cells, wherein the programming operation is configured to increase a respective threshold voltage of each memory cell of a subset of memory cells of the plurality of memory cells from the erased data state to a respective data state of the plurality of data states higher than the erased data state;
wherein a particular programming pulse of the plurality of programming pulses has a voltage level that is the desired programming step voltage higher than a voltage level of an immediately prior programming pulse of the plurality of programming pulses.